## Line Chart: DP4 Unit Compute Density and Power @ TSMC 28nm (No Psum)
### Overview
The chart compares compute density (TFLOPs/mm²) and power consumption (mW) across six DP4 unit configurations at TSMC 28nm process node. Two y-axes are used: left for compute density (0–150 TFLOPs/mm²) and right for power consumption (0–2.0 mW). The x-axis categorizes units by operation type (MAC, ADD, LUT) and precision (FP16/FP8).
### Components/Axes
- **X-axis**: Unit configurations:
- W_FP16A_FP16 MAC
- W_INT1A_FP16 ADD
- W_INT1A_FP16 LUT
- W_FP8A_FP8 MAC
- W_INT1A_FP8 ADD
- W_INT1A_FP8 LUT
- **Left Y-axis**: Compute Density (TFLOPs/mm²) [0–150]
- **Right Y-axis**: Power Consumption (mW) [0–2.0]
- **Legend**:
- Red line/dots: Power Consumption
- Gray bars: Compute Density
- **Spatial Grounding**: Legend positioned top-right; red line connects power consumption points across x-axis.
### Detailed Analysis
1. **Compute Density (Gray Bars)**:
- **W_FP16A_FP16 MAC**: ~3 TFLOPs/mm²
- **W_INT1A_FP16 ADD**: ~8 TFLOPs/mm²
- **W_INT1A_FP16 LUT**: ~65 TFLOPs/mm²
- **W_FP8A_FP8 MAC**: ~10 TFLOPs/mm²
- **W_INT1A_FP8 ADD**: ~20 TFLOPs/mm²
- **W_INT1A_FP8 LUT**: ~130 TFLOPs/mm²
- *Trend*: Compute density increases significantly for LUT operations, peaking at 130 TFLOPs/mm² for W_INT1A_FP8 LUT.
2. **Power Consumption (Red Line/Dots)**:
- **W_FP16A_FP16 MAC**: ~1.8 mW
- **W_INT1A_FP16 ADD**: ~0.6 mW
- **W_INT1A_FP16 LUT**: ~0.1 mW
- **W_FP8A_FP8 MAC**: ~0.5 mW
- **W_INT1A_FP8 ADD**: ~0.3 mW
- **W_INT1A_FP8 LUT**: ~0.05 mW
- *Trend*: Power consumption decreases monotonically from MAC (~1.8 mW) to LUT (~0.05 mW).
### Key Observations
- **Compute Density Outlier**: W_INT1A_FP8 LUT achieves the highest compute density (130 TFLOPs/mm²), 26× higher than W_FP16A_FP16 MAC.
- **Power Efficiency**: LUT operations consume 36× less power than MAC operations (0.05 mW vs. 1.8 mW).
- **Precision Impact**: FP8 configurations (W_FP8A_FP8 MAC) show 50% lower compute density than FP16 LUT but 10× lower power consumption.
### Interpretation
The data demonstrates a trade-off between compute density and power efficiency:
- **LUT Operations**: Maximize compute density while minimizing power, suggesting architectural optimizations for LUT-heavy workloads.
- **FP8 vs. FP16**: FP8 reduces power consumption by 70–90% compared to FP16 but sacrifices compute density. This aligns with TSMC 28nm’s voltage scaling benefits for lower-precision operations.
- **Anomaly**: W_INT1A_FP8 LUT’s power consumption (0.05 mW) is 20× lower than W_INT1A_FP16 LUT (0.1 mW), indicating precision-dependent power scaling.
The chart highlights the importance of precision and operation type in optimizing compute density and power efficiency for DP4 units.
