## Diagram: Synchronous, Pseudo-asynchronous, and Truly Asynchronous Gibbs
### Overview
The image presents three diagrams illustrating different approaches to Gibbs sampling: Synchronous, Pseudo-asynchronous, and Truly Asynchronous. Each diagram includes a network of interconnected nodes representing 'N p-bits', along with a timing diagram showing how these bits are updated.
### Components/Axes
* **Titles:**
* (a) Synchronous Gibbs
* (b) Pseudo-asynchronous Gibbs
* (c) Truly Asynchronous Gibbs
* **Network Diagrams:** Each diagram features a network of nodes (representing p-bits) connected by lines.
* **Timing Diagrams:** Each diagram includes a timing diagram illustrating the update sequence of the p-bits.
* **Labels:**
* N p-bits (present in all three diagrams)
* Tclk (clock period)
* VDD
* m
* Hardware p-bit
* **Textual Annotations:**
* Diagram (a): "update p-bit 1", "update p-bit 2 with updated p-bit 1", "update p-bit N with updated p-bits 1 to N-1", "time to update all p-bits = NTclk"
* Diagram (b): "5 Colors", "update all p-bits with color 1", "update all p-bits with color 2 based on updated color 1 p-bits", "update all p-bits with color 5 based on updated color 1 to 4 p-bits", "time to update all p-bits = Tclk", "phase shifted"
* Diagram (c): "no careful phase-shifting or graph coloring", "average clock period <Tp-bit>", "time to update all p-bits ≈ <Tp-bit>"
### Detailed Analysis
**Diagram (a): Synchronous Gibbs**
* **Network:** A network of approximately 40 nodes (p-bits), all colored blue, connected by gray lines.
* **Timing Diagram:** A single clock signal with period Tclk. All p-bits are updated sequentially within each clock cycle. The update sequence is explicitly described: p-bit 1 is updated first, then p-bit 2 based on the updated p-bit 1, and so on until p-bit N is updated based on the updated p-bits 1 to N-1.
* **Time to Update:** The total time to update all p-bits is NTclk, where N is the number of p-bits.
**Diagram (b): Pseudo-asynchronous Gibbs**
* **Network:** A network of approximately 40 nodes (p-bits), colored with 5 different colors: blue, orange, green, yellow, and purple. The nodes are connected by gray lines.
* **Timing Diagram:** Three phase-shifted clock signals are shown. The first clock signal (blue) updates all p-bits with color 1. The second clock signal (orange) updates all p-bits with color 2 based on the updated color 1 p-bits. The last clock signal (purple) updates all p-bits with color 5 based on the updated color 1 to 4 p-bits.
* **Time to Update:** The total time to update all p-bits is Tclk.
**Diagram (c): Truly Asynchronous Gibbs**
* **Network:** A network of approximately 40 nodes (p-bits), all colored blue, connected by gray lines.
* **Timing Diagram:** Multiple clock signals are shown, with no careful phase-shifting or graph coloring.
* **Hardware p-bit:** A diagram of a hardware p-bit is shown, with labels VDD and m. The p-bit is composed of stacked layers of blue, yellow, and purple.
* **Time to Update:** The average clock period is less than Tp-bit, and the time to update all p-bits is approximately equal to Tp-bit.
### Key Observations
* **Synchronous Gibbs:** Updates all p-bits sequentially within each clock cycle, resulting in a longer update time.
* **Pseudo-asynchronous Gibbs:** Uses color-based updating with phase-shifted clock signals, reducing the update time.
* **Truly Asynchronous Gibbs:** Updates p-bits asynchronously without careful phase-shifting or graph coloring, achieving the shortest update time.
### Interpretation
The diagrams illustrate the trade-offs between different Gibbs sampling approaches in terms of update time and complexity. Synchronous Gibbs is the simplest but slowest, while Truly Asynchronous Gibbs is the fastest but requires more complex hardware and control. Pseudo-asynchronous Gibbs offers a compromise between speed and complexity by using color-based updating with phase-shifted clock signals. The choice of which approach to use depends on the specific application and the desired balance between speed, hardware complexity, and control overhead.
